74F50109 Datasheet
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74F50109 и другие
Компонент | Описание | Производитель | |
74F50109 | Synchronizing dual J-K positive edge-triggered flip-flop with metastable immune characteristics |
NXP Semiconductors |
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DDU4F-5010 | 5-TAP, TTL-interfaced fixed delay line |
Data Delay Devices, Inc. |
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DDU4F-5010A2 | 5-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU4F) |
Data Delay Devices, Inc. |
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DDU4F-5010B2 | 5-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU4F) |
Data Delay Devices, Inc. |
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DDU4F-5010M | 5-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU4F) |
Data Delay Devices, Inc. |
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DDU4F-5010MC | 5-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU4F) |
Data Delay Devices, Inc. |
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DDU4F-5010MC2 | 5-TAP, TTL-interfaced fixed delay line |
Data Delay Devices, Inc. |
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N74F50109D | Synchronizing dual J-K positive edge-triggered flip-flop with metastable immune characteristics |
NXP Semiconductors |
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N74F50109N | Synchronizing dual J-K positive edge-triggered flip-flop with metastable immune characteristics |
NXP Semiconductors |